It is hard to be creative when you are putting a lot of pressure on yourself. I was onsite for a week doing some intense work and I came up with our best ideas while I was driving to dinner. Creativity just can’t be forced.
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That is crazy. I get amazing ideas while I am driving. I assume it is one of the few times my hands are busy but my mind is in cruise control with the task at hand.
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I have said for a long time that one benefit of working from home is you can shower in the middle of the day, which helps creativity. Most people don’t want to think about it, but it really does help.
In drought-a-fornia short showers are a habit, but yes, I can still figure some things out in there as well.
I ride the same bike lane everyday. 10 km each way, all year round. Today I passed 11 111km on my second ebike. Very apparent thoughts pop up in my mind on the first tall bridge. Deeper and more complicated ideas/understandings occurs on the last hill reaching work. It’s fascinating how the physical activity and movement through the landscape facilities mental processes, without actually trying to!
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Still ~80x100mm, using 2 or 4 layers? 4 layers cost more (e.g. FR-4 Black 100qty, 2 layer ~$0.47 per board, 4 layer ~$0.95), but only slightly more when full board parts/assembly is considered. Would routing proper Grounding/Power and signal return-paths/shielding for signaling be easier with 4 layers, minimizing interference, with a good layer stack up ?
Curious what PCB designers here recommend? Would be nice to see this board be useful for various scenarios, but am not expecting to be used for everything. e.g. Someone working on mostly printed electrogravitic propulsion build may want to consider an alternative more heavily shielded board design.
Coming from a guy who graduated in comp sci + AI + electrical eng ~25yrs ago,
watched a bunch of PCB related YouTube videos, and has only made 3 fabricated PCB designs, and one of which was a Pioneer Sat plaque inspired beer coaster…
Am most creative when taking a drive, stroll, jog, poop, shower - Basically any time and space where mildly physically occupied, but cognitive bandwidth is free to wander uninterrupted towards an idea, or beyond a local maxima we’ve overly tunneled visioned into.
Related :
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No, Currently it is now 90x100. Yeah taking a quick look it goes from $0.80/per PCB to $1.61/per PCB
Currently, 2, but I am considering 4 just to reduce the size (and to design a 4 layer board!). Especially now that you pointed out the cost difference.
I just feel like this board can be smaller. I keep playing with things and there are ways. Maybe when it tests complete, we can all give it a shot before I run another batch.
For an extra $0.80/per board, reducing the footprint would be worth it, just for the fact that the LR3 runs with the board on its back. A tiny board could be put anywhere, including in the beam, for the ultimate clean build.
I was shown the firmware does currently seem to be fully functional with the upgrade, we will not know for certain until it can be tested on actual hardware. It looks to be a green light to use 2209’s now reducing the driver cost by HALF, and increasing total current capacity (even though we do not need it). How cool is that, custom board, and custom firmware. That firmware will certainly open the door for other boards to do the same. Using the ESP32 limited IO in creative ways is Bart’s superpower it seems.
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I forgot to mention… Thinking ahead to the type of compact enclosure(s) you’d want this to be housed in, and how the wiring would be run, and strain reliefed… With more layers, would moving power/signaling connectors onto the same side might be easier? Am assuming you’re going for a compact, clean, neat, wiring/housing setup?
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The in and out are all on one side, steppers are on the other. Power in and the module face the 3rd side. Side 4 has the SD card slot hanging off the edge . That means one side can be close to the edge of the box and the three other need minimal space. (Some of the modules take more room than others but I think those will rarely be used).
If the power input moves inboard 5-10mm, or gets turned 90 degrees, it would mean the board really only has two main sides with wires.
I’d definitely recommend moving to 4 layers. There really aren’t any downsides these days, aside from a very marginal cost increase that can sometimes be entirely offset by shrinking the board.
The EMI performance increase is pretty noteworthy, especially at higher frequencies. It also dramatically reduces routing complexity because you’re not worrying about power distribution in amongst your routing layers, which also improves signal integrity etc.
A recent design was 4 layers @ 6oz, ~1kVdc, 200Arms for a liquid cooled inverter.
Other general thoughts: I absolutely design to manufacturer’s minimums, but I try to do so sparingly. If you’re using a process that will go down to 0.1mm then use that where needed and try keep it to 0.15 to 0.2mm for things like polygons/planes where there are huge lengths at that separation. If you’re using 4 layers you won’t need planes, so that’ll be easier.
Identify the process specifications you’ll be using first and try stick with those settings. Changing the design part way through because going to 2oz copper means you’re no longer meeting minimum clearances is a huge time sink.
Be very careful of the footprints for your devices. Make sure they’re close to the manufacturer’s recommendation and consider asking the contract assembler to double-check them for you. Our usual contract assembler prefers smaller paste apertures/less paste than manufacturer spec. For passives this doesn’t matter. For ICs with a power pad on the bottom, especially QFNs, that can be pretty important.
When you’re at a place you’re happy with, I’d be happy to put some time aside to run through a design review with you, similar to how we’d do it at work.
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Curious, is the Esp32 module permanently on the board or is it in a pluggable socket like Bart Dring’s board?
Peer review is (in my opinion) the best way to improve quality. Better than testing.
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Looked like ESP32 Node MCU was pluggable to me, nice and easy to replace/upgrade, plus enables sourcing options for build. Only saw 1 header row per side instead of the doubled headers on original board. ESP32 modules come in diff widths. So, using single headers will limit Module options, and pin breakout options.
Hey @vicious1, intentionally using single row headers for ESP32 module?
You’re speaking my language there, 100%. Testing and iterating is super important because it’s how you ensure that any mistakes are caught and corrected. Peer review is how you avoid a ton of those mistakes in the first place! A 1 hour review can easily save 5-6 hours in the lab and a week or 2 on a gantt chart.
It does have to be ‘good’ peer review, though. I’ve sat through a few too many where people are just there to tick the box and won’t ask questions etc.
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Speaking to the specific images of the design above, definitely use more copper. Copper is free (or at least, you’ve already paid for it) and most places don’t charge for vias anymore so it’s worth leaning on heavily. In fact, for power stuff I’ll often route it as a poured polygon where the shape for it is a little ‘weird’. It’s also easy to get super fixated on minimized resistance but it often matters less than minimizing inductance. Resistance is important for reliable voltages at spread nodes around the board and avoiding heating the board too much. Inductance is what actually breaks designs. In general, I’d prefer cleaner routing over thicker traces almost every time.
Is that image a 2 layer design currently? With a 2 layer design it’s critically important to consider the return path of each of your signals. Long parallel traces like that are usually fine. Unless they’re super sensitive or have dramatically high speed edges, the amount of cross-talk you’ll get isn’t too bad. Where the issues come in are from breaks in the return path that get shared between the signals. A slot in the ground plane under the traces means that any return currents will need to deviate from flowing directly under the trace which adds a lot of inductance (leading to ringing, slow edges, higher emissions, lower immunity etc.) but worse it adds a lot of coupled inductance between both traces (dramatically higher cross-talk, etc.).
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I’m a software engineer by trade. My reviews are usually offline, with tools that let you look through the changes line by line and have asynchronous questions and answers.
But there are still people who just check the box. Obviously, that doesn’t help improve quality.
There is also a problem at the other end of the spectrum. At least in software PRs, the goal is improvement, not perfection. Some reviews never end because the code is never perfect and the goal posts move. We can maybe accept less quality because an update is easier than in hardware.
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That sounds like a neat approach, I guess that’s one of the advantages of so much of the software design process being fundamentally text and human readable. It’s a bit easier to layer collaboration tools on top of it.
Managing that conflict between ‘good enough’ and ‘perfect’ is definitely a thing in hardware, too. It’s hard because if there’s an issue then it should be raised and noted, but it can quickly feel like nit-picking if there isn’t a clear path forward to a solution. The way I always approach it is that I’m clear that I will bring up every potential issue that I see and, where possible, suggest clear and actionable fixes but ultimately it’s up to the primary designer of the board to take responsibility for whatever feedback is taken on board and how changes are made.
I had one project where the designer and I had a clear disagreement on a specific issue where it was somewhat of a ‘damned if you do, damned if you don’t’ kind of thing. The concession was that my objection was noted and if the issue occurred then he owed me a beer. He was a good sport about it and brought me a beer from a local brewery next time I was in the country anyway.
I think for hardware stuff it helps to have an asynchronous portion ahead of time to familiarize yourself and prepare a list of questions, because so little of the design is inherently ‘self documenting’. This is where having notes on a schematic about expected power loss in passives, corner frequencies and step responses of filters, expected frequencies/bandwidths of input signals, required rise-time specs etc. all helps to make it easier to double-check. Then an ‘in-person’ review where the key requirements of the design get explained and looked at alongside the schematics and layouts. It’s a lot easier, to me at least, to discuss design intent and consider how competing objectives were weighed against one another in a slightly more ‘hands on’ fashion like that.
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Heck yeah!
Pluggable. There seems to be a new version of the esp coming out the s3, same footprint, they are already working on with in Fluidnc. Not sore of the benefits other than a few pins have some more options.
Yeah I don’t think the other size is common anymore.
Yes, currently 2 layer. I don’t think anything here would be considered high speed though. I could be wrong.
Well I am excited to learn 4 layer stuff. I will look it up see what I should be doing as the basics and see how it goes. It will still need to be at least 6 drivers long, but it should be able to get skinnier. This sounds fun.
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I’ll move back over to the other thread to provide more detail. Custom Bart Dring 6 pack controller
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